Parallel speed-up and efficiency in single loop sums and matrix multiplication

Authors

Robert C Tacbad; Francis N. C. Paraan

Source

Proceedings of the 31st Samahang Pisika ng Pilipinas Physics Congress, University of San Carlos, Cebu City, SPP2013-PB-09 (2013).

Abstract

This study aims to evaluate the performance of parallel implementations of single loop sums and matrix multiplication using the Message Passing Interface. Benchmark results were obtained from the available computing resources of the Structure and Dynamics Group (SanD). These implementations were run using 1 to 24 processors and their speed-up and efficiency were calculated. Nearly ideal speed up and efficiency was observed when tasks were distributed over physical cores of a single CPU.